Re: Co to?

Autor: Zofia Patkowska (zosia_at_ternet.pl)
Data: Tue 23 Apr 1996 - 01:30:24 MET DST


Pozdrowienia wszystkim,

kto czyta, pamieta: wpadlam w obsesje wyjasnienia co to dokladnie
jest:
 - pipeline cache (dlaczego akurat pipeline?);
 - pamiec EDO;
pare wyjasnien tu bylo, takie sobie (moze poza Grego)... Ale dalej
nie wiem na pewno jak to dziala...
Szukalam po Internecie "EDO RAM": nic nie ma w FAQ's i sites, tylko w
news troche. Zabawne - podobne pytania i podobne odpowiedzi. Nizej
wybrane articles. Wszystko mi sie zgadzalo az do ostatniego (Dave'a
Tatosiana); zdaje sie, ze tylko on wie cos dokladnie (albo umie robic takie
wrazenie). No na pewno ma racje

          "Get a grip. Get a clue. Get a databook."

zaczynam szukac databook...
   A moze ktos ostatnio ogladal strony producentow polprzewodnikow?
Nic tam nie ma? Skad ja wezme aktualne katalogi... Nie ma tu zadnego
elektronika na biezaco ????

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Re: !! 8 meg EDO memory BLOWOUT !!
Date: 14 Apr 1996 15:15:11 GMT
Newsgroups: misc.forsale.computers.discussion
From: Jim Mueller redtbird_at_execpc.com

chad_at_pdsc.ti.robins.af.mil writes:
> ELR wrote:
> >

> Well, there seems to be quite a few people on either side of the fence.
> Does anybody have any technical info of what exactly is different
> about EDO vs. regular RAM of the same speed?

EDO RAM is a joke. The difference is very small indeed. I've read in
Computer Shopper (and numerous other tech magazines) the difference is
around 2%-3%. In fact, the numbers aren't even consistent. Because the gain
(if any) is so small, that statisticly they fall within the margin of
error of the benchmark program. I wouldn't pay more than a couple of bucks
extra for EDO RAM.

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Re: EDO RAM
Date: 14 Apr 1996 23:55:07 GMT
Newsgroups: comp.sys.ibm.pc.hardware.chips
From: *c*e*l*e*s*t*e* <wgkowala_at_alpha.delta.edu>

EDO Ram is extended data output ram capable of being read more than
once without a column and row address strobe (refresh-all DRAM needs).
Fast Page Mode DRAM's cells are more capacitive and need a refresh after
only one read. Some BIOS can use either by I expect not both.

=

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Re: EDO RAM
Date: Mon, 15 Apr 1996 22:13:48 -0700
Newsgroups: comp.sys.ibm.pc.hardware.chips
From: Lamar O. Keller lokeller_at_sava.gulfnet.com

*c*e*l*e*s*t*e* wrote:
>
> one read. Some BIOS can use either by I expect not both.

According to the User's Manual, the Tyan III w/Award BIOS will accept
EDO or Fast Page Mode DRAMs.

Lamar Keller

------------------------------------------------------------------------------
Re: Burst pipeline cache
Date: 16 Apr 1996 21:01:12 GMT
Newsgroups: comp.sys.ibm.pc.hardware.systems
From: Jim Mueller redtbird_at_execpc.com

david_at_odin.etsiig.uniovi.es (David Basanta Gutierrez) writes:
> I've been told that it doesn't make much difference to have a burst
> pipeline cache or an asyncronous one if you don't have EDO RAM. Is it true?
>

NO!!! That IS NOT true. Pipeline will speed your system up to 20%
over asynch cache. EDO makes little difference....EDO is next to worthless...some claim
a 1%-2% gain..which is within the error tolereance of the benchmarks.

Regards

Jim M

------------------------------------------------------------------------------
Re: EDO RAM
Date: Thu, 18 Apr 96 02:37:52 GMT
Newsgroups: comp.sys.ibm.pc.hardware.chips
From: tatosian_at_eng.pko.dec.com (Dave Tatosian)

In article 4ks38r$2a2_at_alpha.delta.edu;,
   *c*e*l*e*s*t*e* wgkowala_at_alpha.delta.edu wrote:
> EDO Ram is extended data output ram capable of being read more than
> once without a column and row address strobe (refresh-all DRAM needs).

Wrong, wrong, wrong...Just like Fast Page Mode DRAMs, EDO DRAMs
require a CAS pulse for each and every "in page" access. The only difference is
that the EDO DRAM output driver doesn't go into a high-impedance state when
CAS precharge occurs between successive page mode accesses...

> Fast Page Mode DRAM's cells are more capacitive and need a refresh
> after only one read. Some BIOS can use either by I expect not both.

Wrong, wrong, wrong...Just like EDO DRAMs, Fast Page Mode DRAMs
require a refresh operation an average of 15.6 microseconds. You can fit a
sh*tload of memory read op's between two Refresh op's - and there's absolutely NO
difference in this regard between EDO and FPM DRAMs...

Get a grip. Get a clue. Get a databook.

Cheers!

/dave

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NA TYM KONCZE TEMAT...

chyba ze zmienie zdanie (bo ktos napisze cos nowego)...

                                                          zo
                                                          



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